UNIT 2
ADDITION, SUBTRACTION, MULTIPLICATION AND DIVISION
1. Which methods of demonstration of numbers is a feature of in large amount of memory than others?
a) Sign-magnitude
b) 1’s compliment
c) 2’s compliment
d) None
Answer:a

2. Which illustration is most efficient to perform arithmetic operations on the numbers ?
a) Sign-magnitude
b) 1’s compliment
c) 2’S compliment
d) None of the above

Answer:c
Explanation: The two’s compliment form is more suitable to perform arithmetic operations as there is no need to involve the sign of the number into consideration.
3. Which method of representation has two representations for ‘0’ ?
a) Sign-magnitude
b) 1’s compliment
c) 2’s compliment
d) None of the above

Answer:a

4. When we perform subtraction …show more content…
The type of memory task used in Intel processors is _____ .
a) Little Endian
b) Medium Endian
c) Big Endian
d) None

Answer:a

33. The Big Endian assignment to stock a number, the sign bit of the number is stored in _____ .
a) The higher order byte of the word
b) The Middle order byte of the word
c) The lower order byte of the word
d) None
Answer:a

34. To get the physical address from the logical address produced by CPU we use ____ .
a) ALU
b) MMU
c) CPU
d) None

Answer:b

35.Which method is used to map logical addresses of adaptable length onto physical memory?.
a) Overlays
b) Paging
c) Segmentation
d) Paging with segmentation

Answer:c

36. During transmission of data among the processor and memory we use ______ .
a) Cache
b) Adders
C) Accumulators
d) Registers

Answer:d

37. Physical memory is separated into groups of limited size called as ______ .
a) Frames
b) Blocksc) Pages
d) None

Answer:a

38. RTN stands for,
a) Register Transfer Notation
b) Regular Transmission Notation
c) Register Transmission Notation
d) None

Answer:a

39. In a system, which one has 32 registers the register id is ____ long.
a) 8 bits
b) 16 bits
c) 5 bits
d) 2 bits

Answer:c

40. The two stages of implementing an instruction …show more content…
The half adder executes
[A] Binary addition operation for 2 binary inputs
[B] Decimal addition operation for 2 decimal inputs
[C] Decimal addition operation for 2 binary inputs
[D] None
Answer: Option C
50.The half adder executes decimal addition operation for two binary inputs 7. Which Logic circuit would you use for addressing memory?
[A] Multiplexer [B] Full adder
[C] Decoder [D] Encoder
Answer: Option C

51. One of the major modificationsamong a combinational logic circuit such as a decoder and a storage circuit such as an RS latch is that [A]. The storage circuit uses feedback
[B] The storage circuit requires a clock input. [C] The storage circuit requires a different class of gates
[D] None
Answer: Option B
52. A Flip-Flop circuit can be used for [A] Counting [B] Modulation
[C] Scaling
[D] None
Answer: Option A
53. One bit full adder can be considered using
[A] one OR gate
[B] Two half adders
[C] One Ex-OR
[D] Half Adders
Answer: Option B
(54) To add 16-bit numbers, the number of full adders and half-adders compulsory are

(A) 1 half-adders and 12