The purpose of this lab was to design a hardware implementation of an elementary cellular automaton and display the evolving state of that automaton on a VGA screen (with a minimum resolution of 320x240). In the implementation, there was to be a way for the user to set the evolution rule which defined how each new generation formed from the previous generation. Additionally, the user should be able to press a button and display another screen with the next set of evolved states. The initial condition was to be selectable and either a single white cell in the center of the first generation or a random cellular automaton. In the proceeding sections we will discuss our implementation, the results, comparisons with natural phenomena and possible improvements to the design.
Design and Testing
Overview
As mentioned above, the implementation of the 1D cellular automaton was completed in hardware and no software was designed. We used the Altera DE2 development board and the Cyclone II E2C35 FPGA. Since each cell of a new generation of the 1D cellular automaton is calculated by three cells from the previous generation and we wanted to generate the cellular automaton with hardware, a state machine running at 27Mhz was implemented to read from the memory, generate the new cell and store it back into memory. We also implemented a separate VGA interface that fed the VGA output with data and sync signals.
Memory Structure
All cellular automaton data was stored in M4K memory